{"id":6460,"date":"2026-06-08T08:14:47","date_gmt":"2026-06-08T08:14:47","guid":{"rendered":"https:\/\/wiresawcutter.com\/?p=6460"},"modified":"2026-06-08T08:14:47","modified_gmt":"2026-06-08T08:14:47","slug":"how-chips-are-made","status":"publish","type":"post","link":"https:\/\/wiresawcutter.com\/ja\/blog\/how-chips-are-made\/","title":{"rendered":"\u30b3\u30f3\u30d4\u30e5\u30fc\u30bf\u30c1\u30c3\u30d7\u306e\u88fd\u9020\u65b9\u6cd5: \u30b7\u30ea\u30b3\u30f3\u30a6\u30a7\u30fc\u30cf\u304b\u3089\u6700\u7d42\u30c1\u30c3\u30d7\u307e\u3067"},"content":{"rendered":"
How are computer chips made? In the shortest useful answer, a chip starts as purified silicon, becomes a polished wafer, goes through many cycles of film growth, photolithography, etching, doping, cleaning, and inspection, then is tested, diced, packaged, and tested again.That sequence sounds neat. Real work is less tidy. One silicon wafer can see hundreds of tightly controlled process moves before it becomes a memory chip, CPU, sensor, power device, or application-specific integrated circuit for electronic devices such as smartphones, servers, cars, and factory controls. One speck of contamination, a thickness error, a weak photoresist result, or rough wafer slicing can turn good silicon into scrap.<\/p>\n
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Quick Specs<\/h2>\n\n\n\n\n\n\n\n\n
Starting material<\/th>\nHigh-purity silicon crystal sliced into wafers<\/td>\n<\/tr>\n
Core wafer step<\/th>\nIngot slicing, lapping, polishing, cleaning, and inspection<\/td>\n<\/tr>\n
Patterning method<\/th>\nPhotolithography; EUV for selected advanced nodes<\/td>\n<\/tr>\n
Repeated fab cycle<\/th>\nDeposit or grow film, coat resist, expose, develop, etch, dope, clean, inspect<\/td>\n<\/tr>\n
Back-end steps<\/th>\nWafer probe, dicing, packaging, burn-in or final test<\/td>\n<\/tr>\n
Buyer bridge<\/th>\nWafer cutting affects kerf loss, TTV, surface damage, breakage risk, and later yield work<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/div>\n

Microchips are made in fabrication facilities, but the shorthand can hide the chain. In beginner explanations, sand is melted and refined into pure silicon; after crystal growth, the ingot is sliced into thin wafers. During chip fabrication, materials are added by methods such as chemical vapor deposition and physical vapor deposition. A layer of silicon dioxide may act as an insulator before a process known as photolithography and a process called doping set the pattern and conductivity.<\/p>\n

Silicon chips are made of silicon, and most mainstream microelectronic devices are made from silicon wafers, yet chip design decides whether the result becomes analog chips, digital chips, application-specific integrated chips, memory, or processor devices. The type of chip sets electrical connections, package choice, and how the final device will process data for computer processing. Because features can be nanometers in size while wafers are measured in millimeter-scale thickness, microchip manufacturing needs both chip technology and precision material handling to make chips at scale. Later, the wafer is cut into die.<\/p>\n

In the semiconductor industry, microchips made for phones, vehicles, servers, and control boards are a set of electronic circuits formed through the chip industry supply chain. Extreme ultraviolet lithography works on incredibly small features, while dopants change the properties of the silicon before the wafer becomes a finished device.<\/p>\n

How Are Computer Chips Made? 9-Stage Process At A Glance<\/h2>\n

\"How<\/p>\n

Use the Wafer-to-Chip 9-Gate Map<\/strong> as the working mental model. Each gate turns raw material into something closer to a working electronic circuit. It also shows where process errors start to cost money.<\/p>\n\n\n\n\n\n\n\n\n\n\n\n\n\n
Gate<\/th>\nMain work<\/th>\nDefect risk<\/th>\nControl point<\/th>\nBuyer or engineer question<\/th>\n<\/tr>\n<\/thead>\n
1<\/td>\nPurify silicon<\/td>\nWrong impurity level<\/td>\nResistivity and crystal quality<\/td>\nWhich grade is required?<\/td>\n<\/tr>\n
2<\/td>\nGrow ingot<\/td>\nCrystal defect<\/td>\nOrientation and dopant profile<\/td>\nWhat wafer diameter and orientation?<\/td>\n<\/tr>\n
3<\/td>\nSlice wafer<\/td>\nKerf loss, TTV, subsurface damage<\/td>\nWire speed, wire diameter, tension<\/td>\nCan the saw hold flatness?<\/td>\n<\/tr>\n
4<\/td>\nPolish and clean<\/td>\nParticles, roughness, stains<\/td>\nSurface roughness and cleanliness<\/td>\nWhat inspection follows slicing?<\/td>\n<\/tr>\n
5<\/td>\nBuild films<\/td>\nNon-uniform layers<\/td>\nFilm thickness and stress<\/td>\nIs the wafer ready for repeat cycles?<\/td>\n<\/tr>\n
6<\/td>\nPrint patterns<\/td>\nAlignment or exposure error<\/td>\nOverlay and linewidth<\/td>\nWhich lithography step sets the limit?<\/td>\n<\/tr>\n
7<\/td>\nEtch and dope<\/td>\nWrong geometry or conductivity<\/td>\nEtch profile and ion dose<\/td>\nCan later layers still align?<\/td>\n<\/tr>\n
8<\/td>\nTest and dice<\/td>\nBad die, chipped edge<\/td>\nWafer probe and dicing quality<\/td>\nHow are weak die handled?<\/td>\n<\/tr>\n
9<\/td>\nPackage and final test<\/td>\nThermal or connection failure<\/td>\nPackage reliability and final test<\/td>\nWhat device class is being shipped?<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

Computer chips are not a single material operation. They come from a sequence of material science, optics, chemistry, electrical testing, and packaging choices. That is why a short disruption in one step can slow the whole line.<\/p>\n

Silicon First: Why Computer Chips Start As Wafers<\/h2>\n

\"Silicon<\/p>\n

Silicon matters because its electrical conductivity can be tuned. NIST describes materials such as silicon as the base for integrated circuits because they make complex chips possible for computing, communications, health, transport, and other electronics.<\/p>\n

In practice, chip manufacturing starts with a single-crystal silicon ingot. Manufacturers shape the ingot and slice it into thin circular wafers. BYU Cleanroom defines a wafer as a thin circular slice of single-crystal semiconductor material cut from an ingot and used for semiconductor devices and integrated circuits.<\/p>\n

Standard silicon wafer diameters range from small research wafers to 300 mm production wafers. Larger wafers can carry more die per process run, but they also raise the bar for flatness, bow, warp, and Total Thickness Variation. Poor slicing quality creates extra work before the first circuit layer is built.<\/p>\n

For readers comparing equipment, DONGHE’s silicon wafer cutting wire saw<\/a> page is the relevant bridge from chip explanation to wafer preparation. Fabs may get the spotlight, but the wafer enters that fab with a history: ingot growth, slicing, surface work, cleaning, and inspection.<\/p>\n

Wafer Fabrication: The Repeat Cycle That Builds Chip Layers<\/h2>\n

\"Wafer<\/p>\n

Once a polished silicon wafer enters wafer fabrication, the work becomes repetitive by design. No fab draws the whole electronic circuit in one pass. Instead, it builds a stack of thin films, patterned regions, insulators, doped zones, and metal paths through repeated cycles.<\/p>\n\n\n\n\n\n\n\n\n\n\n
Cycle step<\/th>\nWhat happens<\/th>\nWhat can go wrong<\/th>\n<\/tr>\n<\/thead>\n
Grow or deposit<\/td>\nAdd silicon dioxide, metal, dielectric, or other films<\/td>\nThickness drift, stress, contamination<\/td>\n<\/tr>\n
Coat resist<\/td>\nApply light-sensitive photoresist<\/td>\nCoating voids, particles, poor adhesion<\/td>\n<\/tr>\n
Expose and develop<\/td>\nTransfer mask pattern to the wafer<\/td>\nOverlay error, linewidth drift<\/td>\n<\/tr>\n
Etch<\/td>\nRemove exposed material<\/td>\nSidewall damage, residue, over-etch<\/td>\n<\/tr>\n
Dope<\/td>\nAdd controlled impurities to change conductivity<\/td>\nWrong dose or depth<\/td>\n<\/tr>\n
Clean and inspect<\/td>\nRemove residues and measure results<\/td>\nParticles remain; bad wafers keep moving<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

NIST describes semiconductor facilities with instruments that lay down thin layers on silicon wafers, transfer patterns, and remove material to make custom chips. That short description is the heart of wafer fabrication.<\/p>\n

Photolithography And EUV: How Tiny Circuit Patterns Are Printed<\/h2>\n

\"Photolithography<\/p>\n

Photolithography transfers a circuit design to the wafer. Engineers coat the wafer with photoresist, expose it through a mask, develop the image, and then send it onward for etching or other steps. Engineers may repeat the patterning cycle again and again until transistors and interconnects form a multi-layer electronic circuit.<\/p>\n

How are computer chips made step by step?<\/h3>\n

Step by step, computer chips are made by purifying silicon, growing a crystal ingot, slicing that ingot into wafers, polishing and cleaning each wafer, depositing films, printing circuit patterns with photolithography, etching selected material away, doping regions to control electrical current, forming interconnects, testing the wafer, dicing it into individual chips, packaging those die, and testing the finished device. Some chips use mature process nodes with deep ultraviolet tools; selected advanced chips use EUV lithography for the tightest patterning steps.<\/p>\n\n\n\n\n\n\n
Lithography type<\/th>\nLight wavelength<\/th>\nWhy it matters<\/th>\nHard part<\/th>\n<\/tr>\n<\/thead>\n
Deep UV<\/td>\n193 nm<\/td>\nUsed for many high-volume patterning layers<\/td>\nMulti-patterning and overlay control<\/td>\n<\/tr>\n
EUV<\/td>\n13.5 nm<\/td>\nHelps print smaller features in fewer patterning moves<\/td>\nVacuum path, source power, mirrors, resist, contamination<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

NIST’s EUV work gives the engineering reality behind the shorthand. EUV is not just “shorter light.” Air absorbs it, mirrors can lose reflectivity, materials outgas, and carbon contamination can form under EUV photons.<\/p>\n

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“That’s going to be a big change.”<\/p>\n