Types of Semiconductor Wafers: Silicon, SiC, GaN, GaAs, InP Compared

Buying a semiconductor wafer is not only a material decision. Wafer material shapes the device path, the fabrication limits, the inspection plan, and the way the slice behaves under wire, lap, polish, and etch steps. Logic ICs, solar cells, RF amplifiers, and high-power modules can all start from a round wafer. They should not start from the same buying checklist.

This guide compares the main wafer types by material family, electrical spec, application fit, and cutting risk. It is written for engineers and buyers who need a clear first pass before asking a wafer supplier or a cutting-equipment team for help.

What Is a Semiconductor Wafer?

In this context, a semiconductor wafer is a thin, circular slice of semiconductor material used as the base for electronic devices and integrated circuits. Substrate means the base material. Die means one patterned device area cut from that wafer after fabrication. Chip means the packaged or finished device people usually see later.

In semiconductor industry language, wafers are used as the starting platform for semiconductor devices. Wafers are made when raw silicon is pulled from molten silicon to form wafers from a monocrystalline semiconductor ingot, then sliced into thin wafers for later work. Materials other than silicon may use different crystal growth, bonding, or epitaxy routes. A wafer must fit the fabrication process; wafer manufacturing prepares the blank, while wafer fabrication builds devices upon the wafer.

Most wafers begin as a single crystal ingot, then move through slicing, shaping, lapping, polishing, cleaning, and inspection before device fabrication. That early mechanical history matters. Even a flat-looking wafer can still carry subsurface damage, poor TTV, or edge chips that later show up during lithography, etch, bonding, or thinning.

If your question is mainly how silicon wafers are cut, the deeper process article is DONGHE’s silicon wafer cutting wire saw page. This guide starts one step earlier: which wafer material and spec package should you use?

The 10-Wafer Substrate Triage Map For Types Of Semiconductor Wafers

To compare different types of semiconductor wafers quickly, group them by substrate family first, then by purchase spec and process risk. Use this triage map as a first filter, not a final process recipe. Device design, fab line rules, and supplier availability still decide the final wafer.

Different wafers play different roles in a semiconductor project. Compound semiconductor wafers can solve RF, photonics, or power problems that standard crystalline silicon cannot, while large wafers such as 300mm wafers can change dies per wafer, carrier needs, and material-loss economics. Semiconductor wafer technology keeps moving, but the first decision is still practical: which wafers that can be used in your fab route can your supplier actually deliver?

BYU’s substrate reference groups wafer substrates into silicon, SOI, III-V compounds, II-VI compounds, SiC, sapphire, and other semiconductor material classes. DOE’s wide-bandgap assessment also separates SiC and GaN from silicon because their high-voltage and high-temperature behavior changes power-electronics design.

What are the different types of wafers?

Common semiconductor wafer types include silicon wafers, doped P-type and N-type silicon wafers, epitaxial silicon wafers, SOI wafers, SiC wafers, GaN wafers, GaAs wafers, InP wafers, sapphire wafers, and specialty substrates such as diamond or AlN. Use case, not name alone, decides the useful category.

Types Of Silicon Wafers: Intrinsic, P-Type, N-Type, Epi, And SOI

Silicon wafer buying starts with crystal quality, orientation, dopant, and resistivity. Pure silicon with no intentional impurity is called intrinsic. Once you dope silicon with boron, phosphorus, arsenic, or antimony, it becomes an extrinsic semiconductor with P-type or N-type behavior.

Older textbooks often compare silicon or germanium, but high-quality silicon wafers dominate most modern RFQs. Silicon wafers are available in many grades, and different silicon lots can vary by diameter of wafers, orientation, resistivity, and finish. Crystallographic planes of the wafer matter because a flat or small notch to convey wafer orientation tells the fab how the silicon surface should be aligned. SOI wafers feature silicon over silicon dioxide, so the wafer contains both a device layer and an insulating layer.

SEMI M1-0924 covers ordering information and requirements for high-purity electronic-grade single crystal polished silicon wafers, including substrates for epitaxial, annealed, and SOI wafers. That is why a silicon wafer RFQ should not stop at diameter and price.

Silicon remains the default starting point for many electronics applications because the supply chain, fab equipment, inspection methods, and process recipes are mature. That does not make every silicon wafer equal. One 100 mm P-type test wafer, one 150 mm MEMS wafer, and one 300 mm epitaxial wafer can sit in different procurement lanes.

Wide-Bandgap Semiconductor Material: SiC, GaN, Sapphire, And Specialty Wafers

Wide-bandgap wafers come into the discussion when silicon cannot handle the voltage, temperature, frequency, or optical requirement. DOE identifies SiC and GaN as two major wide-bandgap materials for power electronics, with higher voltage and temperature limits than silicon.

For cutting discussions, SiC and sapphire should be routed differently from standard silicon. DONGHE keeps separate pages for the SiC wafer cutting saw and the sapphire cutting wire saw because hard and brittle substrates need tighter process review than a simple “same saw, new material” assumption.

III-V And Photonics Wafers: GaAs, InP, GaN, And Related Materials

III-V wafers move the decision away from commodity silicon and toward device physics. GaAs is a direct-bandgap material with high electron mobility, which is why it appears in RF, microwave, and optoelectronic devices. BYU lists GaAs with an Eg of 1.43 eV and notes thermal instability above 600 C.

InP is common in photonics and telecom contexts where light generation or detection matters. GaN crosses both groups: it is a III-V material, and it is also a wide-bandgap power and LED material. That overlap is one reason “wafer type” alone is not enough. GaN-on-silicon, GaN-on-SiC, and bulk GaN do not ask for the same process assumptions.

Use III-V wafers when the device needs speed, RF performance, laser behavior, or optical response that silicon cannot provide. Then check fragility, surface finish, and thermal limits before sending the lot into slicing, polishing, bonding, or thinning. For readers comparing saw paths after material selection, DONGHE’s semiconductor multi wire saw article is a better next stop than a general wafer taxonomy page.

Wafer Thickness And Specs Buyers Should Confirm Before Ordering

A wafer supplier can only quote the right wafer if the RFQ has enough fields. “Silicon wafer, 150 mm” is not a spec. It is a starting point.

For one single wafer, the edge of the wafer can decide whether the next step starts cleanly or stalls at incoming inspection. The term substrate is used to denote the base on which layers or devices are built. Wafers also carry purchase-history clues: wafers grown for research, high-quality wafers for production, and wafers that meet a special flatness or wafer processing target should not be mixed in one lot.

BYU’s wafer-spec reference lists diameter, thickness, orientation, dopant, resistivity, bow, warp, TTV, and surface finish as practical spec fields. Its glossary defines bow as centerline curvature, warp as non-planar deviation with concave and convex regions, and TTV as total thickness variation between measured points.

If the question includes upstream ingot preparation, add the crystal diameter, cropping allowance, target slice thickness, and kerf target before asking for equipment advice. DONGHE’s ingot cropping wire saw page fits that earlier step.

Which standards belong in a wafer cutting RFQ?

Keep wafer material standards separate from the shop-floor scenario. SEMI M1 handles polished single crystal silicon wafer ordering, while ISO 14644-1 helps define cleanroom air-cleanliness classes for handling and inspection areas. A cutting project should also name machine-safety context: OSHA 1910.212 and CFR Part 1910.212 cover general machine guarding, while NIOSH material guidance belongs in the review when fine particles or advanced materials are part of the work. ISO, OSHA, CFR Part 1910, and NIOSH do not replace SEMI wafer specs; they frame the environment around wafer processing. Put that standards list beside physical lot fields such as 100 mm, 150 mm, 200 mm, or 300 mm diameter and any under-1 mm handling limit.

How thin are semiconductor wafers?

Many finished wafers are under 1 mm thick, but the right thickness depends on diameter, material, device route, and later thinning. BYU gives silicon examples of 525 um for 100 mm wafers and 675 um for 150 mm wafers. Thin wafers can reduce material use, but they also raise breakage and handling risk.

How Wafer Type Changes Slicing, Wafer Surface Risk, And Fabrication

Electrical purchasing checks do not guarantee a clean mechanical process. Cutting creates a surface. That surface then goes into lapping, polishing, cleaning, etch, bonding, or fabrication. Damage can remain for the next step to remove or manage.

One 2024 Materials paper on monocrystalline silicon diamond-wire sawing found that lower wire speed and higher feed speed increased surface roughness and subsurface microcrack damage depth. It also linked surface roughness and subsurface damage through a nonlinear relation. Those exact settings are not a universal recipe, but the direction is useful: wire speed, feed speed, roughness, and SSD belong in the risk conversation.

When the material is hard, brittle, or expensive, ask for a process review before quoting production volume. DONGHE’s hard and brittle material cutting page and precision diamond wire saw page are the right internal routes for that review.

Inspection Checklist: How To Accept Or Reject A Wafer Lot

Incoming inspection should protect both the device process and the cutting process. Certificates are not enough if the lot arrives chipped, bowed, warped, mislabeled, or outside thickness tolerance.

For cutting teams, the most useful pre-check is not a long report. It is a clean packet: material, diameter, thickness, target slice count, allowed kerf, TTV target, Ra target, edge requirement, and downstream step. If you are still choosing saw format, compare DONGHE’s multi wire saw equipment category with its process articles on kerf loss reduction and diamond wire saw vs slurry saw.

Application-To-Wafer Decision Framework

Use this decision matrix as an initial pass. It does not replace device design, but it can prevent wasted time on an early wrong choice.

For silicon carbide projects, pair the material decision with DONGHE’s silicon carbide cutting guide. For general machine principles, use how diamond wire saw works or the broader article on wire saw in semiconductor manufacturing.

What Is Changing In Semiconductor Wafers And The Semiconductor Industry For 2026?

Do not treat the 2026 wafer story as one clean upward line. SEMI reported Q1 2026 worldwide silicon wafer shipments of 3,275 million square inches, up 13.1% from Q1 2025, but down 4.7% from Q4 2025. In that release, SEMI described recovery as uneven, with AI data centers, advanced logic, memory, and power management stronger than some smartphone and PC-linked demand.

Advanced semiconductor demand is also changing what buyers ask from wafer suppliers. Wafers in the electronics industry now need stronger traceability around thickness, surface condition, and material grade, especially when the strength of the material used affects slicing yield. Some wafers online may look interchangeable by diameter; process engineers still need the supplier certificate before treating them as production-ready.

Three watch items matter for buyers:

• 300 mm wafer demand remains strong in advanced logic, memory, and high-volume silicon work.
• SiC and GaN devices are seeing increased focus as demand rises for high power density and power switching devices that need high voltages, fast switching speeds and low thermal loss.
• 450 mm standards exist, but they should be described as infrastructure and standards work unless a specific fab or supplier proves adoption for your use case.

SEMI’s 450 mm standards page lists published standards for 450 mm wafer handling and related infrastructure. That is different from saying 450 mm is a normal wafer to order today. Keep the RFQ grounded in the supplier’s real offering and the fab line’s carrier limits.

FAQ

Sources Used

• BYU Cleanroom: Types of Wafer Substrates
• BYU Cleanroom: Glossary of Common Wafer Related Terms
• BYU Cleanroom: Wafer Specifications
• SEMI M1: Specification for Polished Single Crystal Silicon Wafers
• SEMI: Q1 2026 Silicon Wafer Shipments
• SEMI: 450 mm Standards
• DOE: Wide Bandgap Semiconductors for Power Electronics
• Materials 2024: Diamond Wire Sawing of Monocrystalline Silicon